RFFE Protocol Validation Suite

The RF Front-End Control Interface ( RFFE) is a MIPI (Mobile Industry Processor Interface) standard with 2-wire synchronous serial, a bi-directional interface that offers a common and widespread method for controlling RF front-end devices. There are a variety of front-end devices, including Power Amplifiers (PA), Low-Noise Amplifiers (LNA), filters, switches, power management modules, antenna tuners, and sensors.

MIPI RFFE Protocol Validation System with PXI 6570 Digital Pattern

Hardware Supported by Soliton's RFFE Protocol Validation Suite (The hardware emulates an RFFE master):

NI PXI Digital Pattern Instrument – PXIe 6570 or 6571

RFFE Slave Validation Features

  1. Ability to support the following RFFE command sequences
    • Register 0 Write
    • Register Write
    • Register Read
    • Extended Register Write (one data byte to sixteen data bytes)
    • Extended Register Read (one data byte to sixteen data bytes)
    • Extended Register Write Long (16-bit address, upto 8 data bytes)
    • Extended Register Read Long (16-bit address, upto 8 data bytes)
    MPI RFFE Protocol Validation Master Slave Register Write Command
    MPI RFFE Protocol Validation Register Master Slave Read Command
  2. Support Master clock frequencies
    • 26MHz (RFFE 1.1v)
    • 54MHz (RFFE 2.1v)
  3. Ability to sweep bus timing parameters (device under test is RFFE Slave)

    TSCLKOH – Clock output high time
    TSCLKOL – Clock output low time
    TD – Time for data output valid from SCLK rising edge
    TSDATAZ – Data drive release time (Bus Park cycle)

    MIPI RFFE Protocol Valdation Bus Timing Bus Park Signal tD tSDATAZ
  4. Ability to sweep VIO line timing parameters

    TVIO-RST – VIO Supply Reset Timing
    TVIO-R – VIO Supply Rise Time

  5. Supports programmable bus voltage levels

    VTP – Positive going Threshold voltage (VOH)
    VTN – Negative going Threshold voltage (VOL)
    VH – Hysteresis voltage

  6. Ability to induce glitch in SCLK and SDATA lines
  7. Ability to induce faults in RFFE packet formation
    • Sending undefined Command frame
    • Inducing parity error in command frame/address frame/data frame
    • Sending command with incompatible length (command interrupted by SSC)
    • Accessing unused registers (read/write)
    • Performing read with Broadcast ID or a GSID
  8. Measure Rise & Fall time at 1ns resolution

    TSCLKOTR (rise) – Clock output transition time (rise)
    TSCLKOTR (fall) – Clock output transition time (fall)
    TSDATAOTR (rise) – Data output transition time (rise)
    TSDATAOTR (fall) – Data output transition time (fall)