I2C Validation Suite

The goal of this suite is to generate a timing, syntax and fault tolerance report of Philips I2C Spec Compliance for any I2C Slave Device within a matter of minutes. The solution requires an NI PXI 65XX instrument to interface to the DUT pins. The solution is open, modular and covers Standard, Fast, Fast Mode pLus and High Speed I2C Modes with customization at TestStand or LabVIEW layer.

Validation Suite Screenshots

  • Test plan Editor

    We take up the responsibility to develop the automation and make parametric
    measurements to characterize Analog, Mixed Signal and Digital ICs across process
    variables such as temperature, supply voltage, operating frequency, electrical load,
    etc.

  • Report Screen

    We take up the responsibility to develop the automation and run the tests to validate
    the firmware on the IC and also run system level validation tests. The automation
    ensures that regression tests can be quickly run after each firmware upgrade.

  • Run Test Screen

    With the introduction of NI STS, code developed in the Lab for PXI systems can be
    reused in production in the STS. This brings in a lot of productivity improvements.
    Soliton provides consulting to help companies maximize this benefit.

Features

Functional Blocks for Basic I2C read and write communication APIs to work with 6556 HSDIO.

Write byte, Read byte

Write N bytes

Read N bytes

Write N – Read N bytes

Option to read/write multiple registers at once ( through input file).
Ability to send and receive I2C commands at different speeds – fSCL.

Standard Mode (100K)

Fast Mode (400K)

Fast Mode Plus (1M)

High Speed Mode (1.7M, 3.4M)

Ability to configure and vary the below I2C bus timing parameters to the min and max range specified in the I2C Spec table.

t_LOW – LOW period of the SCL clock

t_HIGH – HIGH period of the SCL clock

t_HD:DAT – Data Hold time

High Speed Mode (1.7M, 3.4M)

t_HD:STA – Hold time for (Repeated) START condition

t_SU:STA – Setup time for Repeated START condition

t_SU:STO – Setup time for STOP condition

t_BUF – Bus Free time between START and STOP condition

Measure Rise time and Fall time on SCL & SDA lines

tRCL – SCL Rise Time

tFCL – SCL Fall Time

tRCL1 – SCL Rise Time after REPEATED START & after SCK bit

tRDA – SDA Rise Time

tFDA – SDA Fall Time

t_SU:STA – Setup time for Repeated START condition

t_SU:STO – Setup time for STOP condition

t_BUF – Bus Free time between START and STOP condition

Validate tSP parameter by inducing glitches in SCL and SDA lines

tSP – Pulse width of glitches that must be suppressed by the input filter

Ability to control voltage levels(VOL & VOH) of SCL SDA lines.

Adding/Missing a clock bit

Skip START/STOP/RP-START/BYTE/ACK

Send NACK

Send ACK for Last Read Byte

Send Invalid Register Address, Invalid Data Byte

Ability to run, pause, resume, abort, get status of a I2C test script from within TestStand. In this case, the script will be running in the background based on Soliton Script Engine. TestStand will communicate with the Engine using VI Server or similar method.